The present disclosure relates to a semiconductor apparatus, a method of manufacturing the semiconductor apparatus, and an electronic apparatus that are configured to be connected using a stud bump.
As a flip-chip connection technique of a semiconductor apparatus, there is a method of connecting an Au stud bump to an SnAg solder bump or a method of connecting an Au stud bump to an Sn solder bump which is coated with Pd (Japanese Patent Application Laid-Open Nos. 2009-218442 and 2009-239278).
There is a flip-chip connection technique for connecting an Au stud bump to a Cu electrode of a semiconductor chip (Japanese Patent Application Laid-Open No. 2001-60602) or a flip-chip connection technique for connecting an Au stud bump to an Sn-plated Cu electrode (Japanese Patent Application Laid-Open No. 2005-179099).
Moreover, a Cu stud bump substituted for an Au stud bump has been suggested (Japanese Patent Application Laid-Open No. 2011-23568).